Tag Archives: Xilinx

2011: A great year for low-power design, wasn’t it? Part B

2011 was a great year for low-power design. I don’t think I can remember a year as good to low-power designers and I thought I’d devote this second part of my blog post on this topic to review some major … Continue reading

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2011: A great year for low-power design, wasn’t it?

2011 was a great year for low-power design. I don’t think I can remember a year as good to low-power designers. I thought I’d devote this blog to a review of some major developments in 2011 that made low-power designers’ … Continue reading

Posted in 2.5D, ARM, Design, Low-Power, Microcontroller, Multicore, SOC | Tagged , , , , | Leave a comment

Generation-jumping 2.5D Xilinx Virtex-7 2000T FPGA delivers 1,954,560 logic cells, consumes only 20W

Xilinx announced today that it is shipping Virtex-7 2000T FPGAs to customers. This is one monster FPGA. Its 6.8 billion transistors deliver 1,954,560 logic cells, 21.55 Mbits of distributed SRAM, 2160 DSP slices, 46,512Kbits of block RAM, four PCIe ports, 36 … Continue reading

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Altera introduces SoC FPGA melding ARM Cortex-A9 dual-core processor complex with a 28nm FPGA fabric

Xilinx first started to talk publicly about the fusion of processors and FPGAs—a product now known as Zynq—in 2010 and has announced plans to roll out parts by the end of this year. It was inevitable that Altera would eventually … Continue reading

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More on the Xilinx EPP: Three ways to communicate with on-chip peripherals

Last month I discussed the newly introduced Xilinx Extensible Processing Platform (EPP), which represents a new product line and a new venture for FPGA leader Xilinx. To briefly recap, devices in the EPP device family are essentially a high-end microcontroller … Continue reading

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Xilinx redefines the high-end microcontroller with its ARM-based Extensible Processing Platform – Case Studies – Part 2

In my previous blog, I discussed the hard-core features of Xilinx’s new Extensible Processing Platform (EPP) and explained the device at the 50,000-foot level. In this blog, I’ll dig a bit deeper into the thinking behind the EPP’s FPGA fabric … Continue reading

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Xilinx redefines the high-end microcontroller with its ARM-based Extensible Processing Platform – Part 1

Last week at the Embedded Systems Conference (ESC) held in San Jose, California, Xilinx disclosed additional information about its upcoming Extensible Processing Platform (EPP), which I previously discussed in a February 1 blog entry written just after RTECC (the Real … Continue reading

Posted in Design, DRAM, FPGA, Low-Power, SOC | Tagged , , , | 2 Comments