Tag Archives: architectural-level design

System-level design provides maximum control over power

Yesterday morning at DAC, Mentor Graphics rolled out a system-design tool called Vista (I guess Microsoft isn’t using that name any more). Mentor’s Vista is based on the OSCI TML 2.0 transaction-level modeling standard, which Mentor has adopted as a … Continue reading

Posted in Design, EDA, ESL, Low-Power | Tagged , , , | 1 Comment