Thanks for your NoC analysis. It shows good insight into the practical use of today’s NoC technology. At Sonics we use the phrase “Moving SoC design beyond the NoC” to allude to many of the same points you mention in your blog (see my blog http://www.sonicsinc.com/blog/?p=81). For practical SoC design implementations, there are elements of pure NoC technology that can be useful. This is especially true now that the pace and complexity of SoC design have increased — with companies moving aggressively to 45nm technology and below. The number of heterogeneous cores in today’s SoCs can easily exceed 50 — and even up to well over 100 cores. Given the connectivity requirements of these chips, the scalability of the NoC can be useful for cores in the system that can deal with longer latencies. Having said this, I do not foresee any SoCs that will use NoC topology to satisfy 100% of the connectivity requirements. SoC designers need a comprehensive ‘tool box’ of on-chip connectivity solutions to efficiently reconcile the trade-offs between performance, gate count and power. The NoC is one of several important elements in that tool box. The future of SoC design is indeed moving well beyond the “NoC” technology we have previously known (in academia) into combining the best mix of on-chip network technologies to solve real connectivity challenges.

Frank Ferro
Director, Business Development
Sonics, Inc.

You are right, there is a lot of academic nonsense published on NoCs. By the way, academics tend not to restrict themselves to NoCs when it goes about publishing nonsense.

Nonetheless I found your post a little unfair to the commercial success of NoC companies such as Arteris or Sonics. Their IPs are used in mainstream SoCs. There is even a fair chance you have a NoC in your mobile phone.

Arteris NoC used in TI’s OMAP 65nm and 45nm platforms: http://www.design-reuse.com/news/18898/network-on-chip-noc.html

Sonics NoC selected by Toshiba: http://www.design-reuse.com/news/21986/sonics-on-chip-network-toshiba.html

Theo