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Category Archives: SOC
C-to-Gates Synthesis and Low-Power Design
One of the many “pushbutton” design-automation tools that chip designers have sought is a “C-to-Gates” tool that would allow the automated development of hardware from algorithmic descriptions written in the C programming language. The place to start almost any system … Continue reading
NOCs: The Undead of the SOC World
The 7th International SOC Conference in Newport Beach featured a session on NOCs (networks on chip). Perhaps it’s the undue influence of the recent Halloween festivities, but NOCs remind me of vampires, of the undead. They just keep coming back … Continue reading
Posted in SOC, Uncategorized
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The Surprising Popularity Rise of On-Chip Memory
I attended the 7th International SOC Conference in Newport Beach last week and several of the speakers addressed issues relating to SOC and system power. One of these speakers was Bob Madge, Director of Technology Marketing at LSI Corp (formerly … Continue reading
Green Chips in Newport Beach
Yesterday, I moderated a panel on green chip design in Newport Beach at the 7th International SOC Conference. Chances are you didn’t see or hear any of it because there were only 100 people at this conference in total. That’s … Continue reading
