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Category Archives: Design
Multicore server, PC, and embedded designs push memory power, drive use of advanced DDR3 SDRAMs
Systems designers try all sorts of methods to reduce system power consumption. For years, we’ve relied on circuit tricks and have been reducing logic supply levels from the 5V power supplies that were so common in from the 1970s and … Continue reading
SPMT engulfs LPDDR2 standard, making adoption a no-brainer. Meanwhile Marvell jumps on the bandwagon.
An insidious power problem has slowly crept up on embedded-system designers. While most of us were firmly focused on the power dissipation of our ever-expanding logic designs with their increasing number of processor cores in multicore designs, we mostly ignored … Continue reading
More on the Xilinx EPP: Three ways to communicate with on-chip peripherals
Last month I discussed the newly introduced Xilinx Extensible Processing Platform (EPP), which represents a new product line and a new venture for FPGA leader Xilinx. To briefly recap, devices in the EPP device family are essentially a high-end microcontroller … Continue reading
Xilinx redefines the high-end microcontroller with its ARM-based Extensible Processing Platform – Case Studies – Part 2
In my previous blog, I discussed the hard-core features of Xilinx’s new Extensible Processing Platform (EPP) and explained the device at the 50,000-foot level. In this blog, I’ll dig a bit deeper into the thinking behind the EPP’s FPGA fabric … Continue reading
Xilinx redefines the high-end microcontroller with its ARM-based Extensible Processing Platform – Part 1
Last week at the Embedded Systems Conference (ESC) held in San Jose, California, Xilinx disclosed additional information about its upcoming Extensible Processing Platform (EPP), which I previously discussed in a February 1 blog entry written just after RTECC (the Real … Continue reading
Tabula FPGA Scatters Logic, Memory, and Power Across Space and Time
Here’s a head-scratcher for you. Why not create tesseract FPGAs? A tesseract is the 4-dimensional version of a 3D cube. (Just as a 3D cube can be unfolded to make a set of six connected 2D squares, a tesseract can … Continue reading
Intel cuts IC power by allowing, detecting, and correcting errors
The low-power IC-design train has long ridden the rails of lowered supply voltage. However, these lowered supply rails are tangentially approaching transistor threshold voltages and have long been headed for a serious collision because transistors in large, nanometer ICs run … Continue reading
OCZ’s 32Gbyte Onyx SSD breaks $100 barrier, cuts power
It was only a matter of time. Nobody doubts that solid-state disks (SSDs) will decline in price over time. The only questions are “How fast will prices fall?” and “How much storage will I get for my money”? PC component … Continue reading
It’s Raining Low-Power Microcontrollers
Wow. The Embedded World show in Nuremberg is really shaking the low-power microcontrollers out of the tree this year. Cases in point: announcements of new, low-power 8- and 32-bit microcontrollers from Microchip and Energy Micro (a Norwegian fabless microcontroller company) … Continue reading
Power Over Ethernet: One Cable Defines an Entire Product Envelope
Last week, I moderated a Power-Over-Ethernet (POE) session at the Ethernet Technology Summit held in San Jose. The idea of supplying high-speed communications and power over one standard cable that works anywhere in the world is certainly compelling because there … Continue reading
