Category Archives: Clock Gating

Low-energy microprocessor operates 40nm transistors in near-threshold mode to run on 0.4V@1MHz

Late last month at ISSCC, Belgian research center imec and its affiliated Holst Centre in The Netherlands discussed a microprocessor that can run at 1MHz on a 0.4V power supply with the processor’s CMOS transistors operating in near-threshold mode. The … Continue reading

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Jan Rabaey’s remarkable short course in Low-Power Design Essentials, Part 3

Note: This blog entry is the third of four covering Professor Jan Rabaey’s excellent short course in low power design given at the January, 2012 meeting of the Santa Clara Valley Chapter of the IEEE Solid State Circuits Society. Low-Power … Continue reading

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Need to cut IP power? (Who doesn’t?) “Press here” says Calypto

All SoCs are built with IP blocks. Some of those are legacy IP blocks. Some are purchased from other vendors. Some are developed in-house. All of them draw power—static and dynamic power. At nanometer lithographies, the way to cut static … Continue reading

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