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Author Archives: sleibson321
The very strange case of the broken dryer knobs—a case of very non-green design
Perhaps you’re like me—you hate to see bad design that results in waste. Sometimes, it’s a design that uses too much energy. The waste heat seems disproportionate with the function performed. Sometimes, it’s another form of waste. It’s one of … Continue reading
Jan Rabaey’s remarkable short course in Low-Power Design Essentials, Part 3
Note: This blog entry is the third of four covering Professor Jan Rabaey’s excellent short course in low power design given at the January, 2012 meeting of the Santa Clara Valley Chapter of the IEEE Solid State Circuits Society. Low-Power … Continue reading
Jan Rabaey’s remarkable short course in Low-Power Design Essentials, Part 2
Note: This blog entry continues with the excellent short course in low power design that Professor Jan Rabaey taught at the January meeting of the Santa Clara Valley Chapter of the IEEE Solid State Circuits Society. Low-Power Design Essentials, Part … Continue reading
What is analog’s role in low-power design? Interview with TI’s VP of Analog Technology Development, Dr. Venu Menon
Last month, Dr. Venu Menon, VP of Analog Technology Development at Texas Instruments, gave a keynote speech at the ISQED conference in Silicon Valley titled “Applications Drive Analog Technology Development and Innovation.” During his keynote, Dr. Menon noted that analog … Continue reading
Posted in Analog, Design, Flash, FRAM, Low-Power, Microcontroller, SRAM
Tagged analog, microcontroller, Texas Instruments, Wolverine
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How low can you go? ARM does the limbo with Cortex-M0+ processor core. Tiny. Ultra-low-power.
Jack be limbo, Jack be quick Jack go unda limbo stick All around the limbo clock Hey, let’s do the limbo rock Limbo lower now Limbo lower now (From “Limbo Rock” by Chubby Checker) How low can you go? ARM … Continue reading
Jan Rabaey’s remarkable short course in Low-Power Design Essentials, Part 1
At the end of January, UC Berkeley EECS Professor Jan Rabaey gave a comprehensive one-evening course in low-power design essentials to about 100 people attending a meeting of the Santa Clara Valley chapter of the IEEE Solid State Circuits Society. … Continue reading
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Do you believe in 21st century Intelligent Design?
Late last month, columnist Mike Cassidy wrote about visionary Clayton Christensen’s Innovator’s Dilemma in the San Jose Mercury News and his words reminded me that it was time, past time, to make yet another blog-based plea for intelligent design. No, … Continue reading
3-Hour, $50 Short course in Low-Power Design with Prof. Jan Rabaey. Silicon Valley, Jan 31
The Santa Clara Valley (SCV) Chapter of the IEEE Solid State Circuits Society is hosting a 3-hour short course in low-power design a the end of this month. The course is divided into two parts: Fundamentals of low-power design and … Continue reading
Posted in Low-Power
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Is 2012 going to be another breakout year for NAND Flash and Low-Power Design?
It’s just one week into the year, I am increasingly getting the feeling that 2012 is going to be a momentous, tumultuous year for semiconductor technology and low-power system design. Among the many recent events that are giving me this … Continue reading
2011: A great year for low-power design, wasn’t it? Part B
2011 was a great year for low-power design. I don’t think I can remember a year as good to low-power designers and I thought I’d devote this second part of my blog post on this topic to review some major … Continue reading
