IBM Researchers Develop Planar, Monolithic, 1-Transistor Graphene IC—Make Graphene Party Like It’s 1959

This week in Science Magazine, IBM researchers published an article documenting the first graphene IC built using recognizable IC processing techniques. The simple 1-transistor, 2-inductor monolithic circuit operates as an RF mixer with a useful operating frequency of 10GHz. The operating speed is not especially impressive. The lithographic geometries are also unimpressive: a 550nm FET gate length is a process node that dates back well more than a decade for silicon IC processing, even if the researchers used e-beam lithography to draw the patterns.

IBM Graphene chip 

What is impressive? It’s the entire package. The thing that differentiated Fairchild Semiconductor’s planar IC concept from Kilby’s IC concept at TI back in 1959 was that the planar IC process could build circuits of increasing, arbitrary complexity using highly automated lithographic printing techniques. It was the beginning of mass production for electronics.

 

That’s what’s different about this process as discussed in the latest issue of Science Magazine. IBM’s researchers started with a silicon carbide wafer. They grew a two- or three-layer graphene film on the silicon face of the SiC wafer using high-temperature expitaxy. They then patterned the FET gate using PMMA (a transparent acrylic plastic commonly used for e-beam and nanoimprint lithographic processing) and hydrogen silsesquioxane (HSQ, a high-resolution e-beam photoresist) which they exposed with an electron beam. (The authors admit they could also have used more convnentional optical lithography for the geometries used in this experiment.) Researchers removed the excess graphene with an oxygen plasma etch. The FET’s gate dielectric is aluminum oxide, since silicon oxides aren’t to be normally found in this process. The inductors are patterned aluminum. The entire 3-element circuit operates similarly to an RF mixer built from more conventional silicon counterparts.

 

Don’t expect to see graphene ICs rolling off the production lines this year or next. That’s not what this demonstration is about. What this exercise proves is that you can indeed make graphene ICs with processing techniques familiar to anyone in the silicon IC manufacturing business. You can also make graphene FETs that operate at interesting frequencies using fairly large geometries by 21st-century standards even though graphene doesn’t have a natural band gap. As IBM’s press release points out, these same researchers have built graphene FETs with much higher operating frequencies using smaller gate lengths, but these earlier experiments did not employ assembly techniques resembling those in common use today for making silicon ICs. Now there’s an initial manufacturing process for mass production of graphene ICs. Now, it gets interesting.

This entry was posted in Graphene and tagged . Bookmark the permalink.

Leave a Reply