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Design Articles

CMOS Power Amplifier Technology The Next Step Toward the Single-Chip Cell Phone

Integrate the PA with the rest of the CMOS devices in a cell phone? It can be done.

By Donald McClymont, VP of Marketing, Axiom Microdevices, Inc.

microchip

The market for mobile phones has created a landscape for technological innovation that goes beyond any other consumer product in recent history. The seemingly unstoppable demand for mobile phones has created economies of scale that have driven down the cost of handsets and enabled semiconductor manufacturers to justify the investments necessary to achieve the cost points demanded.

In the last five years we have seen the headline revolution of 3G and its derivatives HSDPA, HSUPA and now LTE, but the quiet revolution has been the demand for simple ultra-low cost (ULC) phones capable of addressing the emerging cell phone markets. Indeed the global ULC market has been estimated as growing more than 14 times faster than the global handset market and will exceed 330m shipments per year by 2011.

The price points necessary to satisfy the emerging markets are demanding. Considerable fanfare accompanied the drive for $30 phones pushed by the GSM Alliance, but now sub $20 phones are being demanded and this downward trend is undoubtedly set to continue. Like no other consumer market – cost really is king!

Semiconductor manufactures have done a good job of rising to this challenge and have achieved cost reductions by reducing process geometry, using lower cost processes and integrating more and more components onto a single die – reducing aggregate component cost as well as taking cost out of the handset manufacturing process. One key factor in this has been the trend away from specialist technologies and standardization on mainstream CMOS technology offering a superior cost point and greater manufacturing capacity. The economies of scale inherent in the CMOS process have driven the semiconductor industry to make significant investments in this process, creating volumes that have outlasted, and will continue to outlast, any niche process offerings.

resonant match
Figure 1: Conventional PA Module Resonant Match

For example, transceiver blocks, previously realized in specialty BiCMOS processes from vendors such as Infineon, NXP, and Skyworks have long since been implemented in CMOS, and in some cases, integrated with the handset’s main processor inside a system-on-chip (SoC) offering. Audio codecs and power management are other examples of functions previously realized in specialty processes. Designers have repeatedly found that implementing an analog block in standard CMOS, has paid off in the long run, despite the hurdles of implementing challenging circuit blocks in a less forgiving process.

Traditionally, the power amplifier (PA) has been the last bastion of non-CMOS technology. Typically, this block is manufactured using a specialty GaAs or LDMOS process coupled with a hybrid module packaging technology, in total an expensive manufacturing flow, which has made it a substantial part of the cell phone bill of materials. The specialty semiconductor process is required to provide a high gain, high frequency transistor element with a high breakdown voltage. The hybrid packaging technology provides high Q passive components to generate the 50 Ohm matching circuit.

What is needed, to propel the next stage of the downward cost curve, is a way to implement the PA using mainstream CMOS and ultimately integrate the functionality onto the system-on-chip.

The Distributed Active Transformer

One of the key challenges in designing a PA on CMOS is how to achieve the impedance transformation needed to get the necessary high output power from a low voltage supply. A conventional PA Module implements a resonant match as shown in Figure 1.

However, in order to maintain a reasonable passive efficiency high Q components are needed and this makes it difficult to implement such a circuit on a typical CMOS process where Qs in the range of only 5 to 15 are achievable.

figure 2
Figure 2: Resonant Match vs. Transformer Match

An alternative approach, as used by Axiom Microdevices, is to use a transformer. This has the benefit that inductively stored energy is low compared to a resonant match, meaning that a transformer structure can have lower Q and still perform the impedance transformation to the same degree of satisfaction. An example is illustrated Figure 2.

Simply using a conventional transformer structure does not solve the problem, as the primary and secondary windings require inductance values which are not feasible to implement. Axiom’s solution to this problem is a technique known as distributed active transformer (DAT) technology. It employs a unique geometry that enables a relatively low Q semiconductor metal to be used to provide a transformer based matching circuit.

The first step in this technology is to note that the Q of a metal slab considered as an inductor is significantly higher that of a multi-turn spiral, in fact, of the order of 20-30. The challenge then is how to connect an active circuit to it, in such a way that the increase in Q is not instantly lost due to the parasitic effects of the connections themselves.

figure 3
Figure 3: Structure of a Complex Slab Inductor

Axiom’s solution lies in distributing the power amplifier core into several blocks and combining the power using the transformer structure. Each power core is differential in nature, which amongst other advantages, allows one terminal of a slab inductor (as described above) to be connected to it and the opposite phase of a neighboring amplifier core. A tuning capacitor is connected in parallel with the output of the differential pair, thus providing a resonant structure which is tuned for frequency response. A single turn secondary loop is placed in close proximity to the primary slabs, creating a transformer structure with high passive efficiency. The power from each core is combined, and the impedance is transformed relative to the ratio of the number of distributed primaries to the single secondary. In the example shown in Figure 3, there are eight slab inductor primaries and a single turn secondary. The impedance transformation is 1:64, thus allowing an equivalent drain impedance of 0.8Ω while driving a 50Ω load.

There are several other major implementation problems which are addressed with this technique:

  • Use of a differential amplifier means that a low impedance ground is not required. In single ended implementations this is of course not the case.
  • There is also a virtual ground at the supply connection. In traditional single-ended implementations, a high value supply choke is required.
  • As both supply and ground are then AC grounds, sensitivity to wire bonding variation is significantly reduced.
  • As the amplifier cores are distributed about the die, thermal hot spots are more spread out, making heat dissipation less of an issue.
  • It is only in the secondary of the transformer that high voltages (in excess of 20V) are generated. In the primary circuit there are no voltages that exceed the design rules for the standard CMOS technology.
  • And finally, as the output connection has to be singled-ended, simply grounding one of the outputs of the secondary provides a neat differential to single-ended conversion.

While the outline above indicates the overall principle of operation, there are many detailed points of engineering required in order to implement the DAT in the target 0.13u standard CMOS process. Each core is configured as a compound differential pair. The bottom pair is switched by the input drive signal while a second, cascaded pair of transistors are stacked on top, in order to drop excess voltage, which would otherwise cause a catastrophic device breakdown resulting in the destruction of the amplifier. The cascaded upper pair is also used as an actuator for the case when the power amplifier is required to produce less power than its maximum. This, coupled with other innovative circuit techniques, allows the device to withstand supply voltages as high as 5.5V while still producing full output power.

figure 4
Figure 4: Signal-Control Circuitry Integrated with PA

Unlike GaAs equivalents, with the power core now on CMOS, the small signal control circuitry required to bias and regulate the power of a GPRS-type power amplifier, may now be integrated in the same die as the main power stages, further reducing the cost of the whole subsystem (Figure 4).

Axiom’s first commercial product, the AX502, a quad-band GSM/GPRS device, integrates a closed-loop type power controller on the same die as the power core, and has demonstrated that CMOS PAs are commercially realizable as a standalone product. This does raise the question about how this technology can be further integrated with transceiver and baseband functions and whether it can keep track of evolving requirements.

Integrating PA with other adjacent blocks already in CMOS

Linear modulation schemes. GPRS is all well and good, but there will be a demand to achieve the same kind of cost point with EDGE and 3G enabled phones in the future. The disadvantage of CMOS is that the fundamental power producing transfer function is highly non-linear. Nevertheless, the overriding advantage is that in CMOS it is very easy to add control circuitry of considerable complexity at minimal cost in terms of die size. Furthermore, because all this control circuitry resides on the same die, it tracks the main power producing components with temperature, voltage and process.

Battery technology evolution. The DAT was originally demonstrated operating from a 2V supply during the early development of the technology. As battery technology evolves to lower voltages, the DAT technology is ideally placed to take advantage of these changes.

Interference. At its maximum operating point the power amplifier produces RF voltages in excess of 20V, which couple to almost every point on the die. Careful design and layout is required in order that the small signal circuitry operates reliably in this environment. Integration of the power control circuitry of the AX502 on the same die as the power core proves that this is possible.

Heat dissipation. The advantage of CMOS is that it is a better thermal conductor compared to GaAs and the die can sit directly on a metal slug in the package which thermally bonds to the pcb. This mechanism enables Axiom’s AX502 product to operate at up to 50% duty cycle without exceeding a die temperature of 125C. Given that a SOC integrating the PA would be in a larger package compared to the PA alone, there is ability to incorporate a larger metal slug in the package and hence improve thermal transfer further to accommodate the increased heat generated by the combination of PA, baseband and transceiver.

Design Process. Perhaps the greatest hurdle is the design process itself. In the realization of AX502, Axiom found that traditional simulation techniques were not sufficient to predict the large signal RF performance of complex passive and active structures. Computationally intense simulation tools to predict passive performance, which had been traditionally deployed for non-IC applications, had to be integrated into a more conventional IC design flow. These tools are still embryonic and integrating these into the design flow for a complete SOC may be challenging.

In summary, for the first time, the elements are in place to integrate the PA with the rest of the CMOS devices in the cellphone. There appear to be no fundamental obstacles, but there is much detailed engineering to be done, which will require the expertise of engineers skilled in the confluence of microelectronics and electromagnetic design.

[Ed. note: In May, 2009 Skyworks acquired Axiom Microdevices and their product lines.]

Skyworks Solutions Inc.
Woburn, MA
(781) 376-3000
www.skyworksinc.com

This article originally appeared in the April, 2008 issue of Portable Design. Reprinted with permission.

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