The Importance of a Bridge Architecture in Tablets
The user experience for tablet devices can be improved significantly by moving to an internal West Bridge architecture that bypasses the many bottlenecks of traditional architectures.
The introduction of the Apple iPad and its initial successful adoption in the market has triggered the introduction of a whole new class of similar consumer devices. These devices, popularly known as tablets or Mobile Internet Devices (MIDs), come in various screen sizes ranging from 5” to 10”, each trying to provide the perfect user experience.
The tablet market segment was conceived for a richer multimedia experience. Today, the most popular use cases of such tablets are:
- Mobile internet device for Data Manipulation, spreadsheets, e-mail, browsing, etc.
- Large screen portable media player (capable of playing HD video, sometimes up to 1080p)
- E-book reader
- Electronic Magazine / newspaper content delivery channel
- Personal Gaming Device
- Photograph viewing device
- Portable Digital TV
It is evident that the key to the success of such devices is the ability to deliver rich multimedia content efficiently and reliably. However, most tablets fail to meet these expectations in terms of the time it takes to download data and the associated power consumption.
USB transfers, as known as side-loading, still remain the most preferred method of transferring large data files to these tablets as they are reliable and free. 3G connectivity and Wi-Fi are not preferred for heavy file transfers because they are not reliable for long periods of connectivity, and the days of flat rate plans for unlimited data transfers are numbered. Telecom carriers are fast realizing that big money lies in data services and are starting to charge more for higher data bandwidth users.
The most important characteristic of file transfers after reliability is how long they take. For example, if it took 15 minutes to upload an HD movie to a tablet, many users might hesitate to use that feature often. This might eliminate a major incentive for consumers to purchase a tablet. In spite of this, most tablets have very poor side-loading speeds. As most tablets do not charge while syncing with a PC, slow side-loading also means faster battery drain and shorter operating life.
Eliminating data transfer bottlenecks for faster side-loading
Figure 1: Typical HS-USB 2.0 side-loading data scheme in tablet designs
Typically in tablet designs, the HS-USB 2.0 and Storage controllers are integrated into the System Processor (SoC). In these SoCs, the side-loaded data is often buffered in the SDRAM (see Figure 1a).
However, this puts the side-loading process in contention for the already busy SDRAM. The SDRAM is already being constantly accessed by the graphics engine, MP3 decoder block, and the microcontroller for code and data. Because of these bus contentions, one can imagine the “internal processor pipe” between the ~30MBps USB pipe and the ~25MBps storage pipe being the bottleneck at ~4MBps bandwidth (see Figure 1b). This is the primary reason for slow side-loading transfer speeds and thereby a poor user experience.
Consider a 3-port “West Bridge” device (see Figure 2). A West Bridge is analogous to the South Bridge in the PC-world and serves as a bridge between the processor, storage, and USB port.
Figure 2: A 3-port "West Bridge" device
Figure 3: A bridge architecture provides optimized data
transfer and processor off-load
Including such a bridge in the system architecture of an embedded system eliminates many side-loading issue. A typical West Bridge has a processor port, storage port and USB port. It also supports DMA transfers between the USB and Storage to avoid placing any load on the processor. Thus, the West Bridge behaves like a fat pipe between the USB port and the Storage (see Figure 3). With such a bridge, it is possible to achieve up to 25MBps transfer speeds between USB and storage. Such devices are already available in the market from multiple vendors.
The bridge architecture not only offloads the main SoC processor while side-loading, but can also behave as a Master controller on its storage port and take care of all the various connectivity protocols. For example, if the Storage port supports SDIO extensions and SPI protocols, this controller further offloads functions from the main SoC like Storage, Wi-Fi, and Bluetooth control, allowing the processor to provide better User Interface responsive.
Longer Battery Life
A West Bridge architecture enables not only faster side-loading but also a significant reduction in power consumption as a result. However, there are a number of other methods where a West Bridge can further reduce power consumption. A West Bridge is typically implemented in a much smaller chip than the main SoC. If all the Wi-Fi, Bluetooth, and USB connectivity is completely controlled by the bridge, the main power-hungry processor could be put into sleep mode more frequently. Rather than the processor having to monitor the various connectivity interfaces, the West Bridge can assume this function and only wake up the main SoC when required. This becomes critical in extending battery life as much lower power consumption can be achieved with a single SoC managing all the interconnects compared to a full processor system.
Longer life-cycles of designs
A West Bridge can also help in the battle against rising ECC bit requirements in supporting raw-MLC/TLC NAND flash. Rather than having to change the processor itself, the bridge alone could be updated every 6-8 months to keep up with the latest ECC trends. In this way, the life-cycle of a particular design architecture can be significantly increased.
What to look for in a Bridge?
In terms of the user experience and power efficiency, a bridge architecture is a must for better user experience in tablet devices. Here is a list of features that system designers should look for when specifying a West Bridge for tablets:
- Support for USB 2.0 OTG. This way, the tablet device can sync with a primary PC/Laptop and also have the ability to support portable storage devices like USB thumb drives.
- Support for USB 3.0 (in the near future). This is the age of Sync-n-Go. Users want to be able to change the content on their devices as instantaneously as possible.
A flexible processor interface is a must for bridges. Every tablet design is different, and such flexibility gives system designers the freedom to develop various possible architectures to give better system level performance.
- SRAM interface – To look like an attached memory to the processor. This would be the fastest connectivity interface between the SoC and the bridge if the speed is required
- NAND interface – To look like a NAND device that is attached to the processor.
- SDIO interface – This allows the bridge to be directly plugged into one of the SDIO ports available on a typical tablet SoC.
- 2 or more ports – To support at least one internal memory and one removable memory
- Raw MLC / TLC NAND support - An ideal bridge should be able to support raw MLC NAND (2 bits per cell) and raw TLC NAND (3 bits per cell). These are the same storage components that lie underneath an SD Card or SSD drive. When the high performance bridge directly supports these NANDs in the rawest form, this eliminates $1-$2 in BOM cost. The bridge should be able to support up to 48-bits of ECC for the design to be relevant over the next 2 years
- SD / MMC support – Support for the standard removable storage media
- SDIO expansion support - SD card support can further be extended to SDIO to support the addition of Wi-Fi, GPS, GPRS, Digital TV demodulators (to support watching Live TV), etc. This allows for peripheral expansion as well as further processor off-loading
- SPI Master – to enable the bridge to control devices like wireless keyboard radios, etc.
- GPIOs – to give flexibility to support the custom needs of an application
Other than just the various interfaces mentioned above, a good Bridge should be able to support
- Independent simultaneous data-paths – This allows the Processor, storage, and USB ports to talk to each other without any bottlenecks or other constraints
- Media Transfer Protocol (MTP) – Many devices have moved away from just Mass Storage Class for enumeration when connected to a PC
- Booting from raw-NAND – The Bridge can reduce BOM cost significantly if it allows consolidation of the Boot NAND into the Mass Storage raw-NAND
- Multiple enumeration support – This allows the tablet to appear as a Mass Storage Class, webcam, 3G modem, or even a 2nd display unit when connected to a PC/Laptop. This way, the various features on the tablet can be individually taken advantage of while docked into another PC/Laptop
Figure 4 shows a pictorial summary of the interconnects.
Figure 4: Summary of I/Os and interconnects
The user experience for tablet devices can be improved significantly by moving to an internal West Bridge architecture that bypasses the many bottlenecks of traditional architectures. By facilitating faster data throughput, developers can improve data transfer speeds while significantly reducing power consumption.
Manu Karan has an MS in Computer Engineering from North Carolina State University and an MBA from the Indian School of Business. He is currently working as an Associate Manager Sr., USB Product Marketing, at Cypress. He can be reached at firstname.lastname@example.org
San Jose, CA