Design Articles

Optimize Power Consumption in Portable Electronics Using Integrated Load Switches

The surest way to eliminate current leakage from a peripheral is to turn it off. Load switches are a critical component in a distributed power management system.

By Philippe Pichot, Texas Instruments

The adoption rate of load switches continues to increase across a broad range of end equipment including portable electronics (mobile phones, portable consumer electronics, notebooks or any portable equipment). Load switches are increasingly used in power management architectures to distribute power from a single regulated source or to switch off any unused peripherals (camera module, WLAN module, SD Card slot, LCD display, etc.) with the goal of limiting current leakages and optimizing the power consumption in a system.

This article summarizes important specifications that need to be considered to switch loads in portable electronics, review the traditional solutions and show how integrated load switches can help designers create an optimized solution.

figure 1
Figure 1: Camera Module Power Switching Architecture Solutions

In many new portable designs, there is a growing need to generate multiple power rails in order to supply power or remove power to a variety of peripherals on the board. By turning-off the peripheral, the designer can minimize peripheral leakages and help optimize the system’s power budget. One possible method for achieving this is to use either point-of-load (POL) devices like DC/DC converters or low drop out voltage (LDO) regulators as shown in Solution #1, Figure 1. Then use the enable pins to shut-down the rails when they are not needed. However, this comes at the expense of an increased component count, which most likely will lead to increased board space and cost.

Another solution to distribute and shut-off rails is to use a simple load switch as shown in Solution #2, Figure 1. This method is usually preferred because it enables the user to deliver a solution with performance similar to Solution #1, but with less board space and cost as switches are usually smaller and more affordable than DC/DC converters.

figure 3
Figure 3: ON resistance vs. input voltage of the TPS22922

Load switches generally consist of a p-channel MOSFET or PMOS transistor with its gate controlled by a NMOS transistor (see Figure 3). Ideally, the user would like to have an output of the load switch which is identical to its input; however, in real operation the output signal is altered due to parasitic effects of the switch. 

To design a load switch-based solution, here are the most important parameters to consider:

  • rON – On-state resistance from drain to source of the pass FET
  • tRISE – Rise time of the switch
  • VIH/VIL – Control thresholds of the switch
  • ICC and ISHUTDOWN – Quiescent and shutdown current
  • Quick Output Discharge feature

One of the critical parameters is the on-resistance of the switch since this will impact the dropout the designer will see across the switch. This is very important when starting a new design with load switches. Designers must be cautious to understand what the maximum acceptable dropout is with regard to their particular application set-up (voltage, current), this can easily be calculated using the formula , where V is the dropout, rON is the ON resistance of the pass FET and I is the current through the switch.

In the example below, the maximum allowed drop across the switch is 0.026-V. Therefore, the on-resistance of the switch must be lower than  over the full temperature range at an input voltage (VIN) of 1.2-V.

In a PMOS transistor, the rON depends on the input voltage of the switch. The rON curve is shown in Figure 3. As shown, the switch’s ON resistance increases with a decreasing input voltage. As a result, designers must be careful to correctly select the switch they want to use depending on the voltage / current combination that they desire to switch.

Another critical parameter the designer needs to consider is the inrush current generated when the switch is initially enabled. If the switch turns on without being controlled, a large inrush current will be created that could result in a supply rail drop at the input of the switch. This could ultimately impact the functionality of the entire system.

The inrush current can be calculated using the following formula:

For example, with a CLOAD=1 µF, V=3-V and a rise time of 1 µS, the inrush current could be as high as 3A!

An easy way to avoid this inrush current is to slow-down the switch’s rise time. This will slowly charge the output capacitor and reduce the current peak. In the example above, a rise time of 200 µS would result in a 15 mA inrush, which is acceptable.

Additionally, when the switch is turned from on to an off state, some users prefer not to have the rail floating and, therefore, use an additional transistor to quickly discharge the output when the switch turns off.

figure 4
Figure 4: Typical load switch implementation
with discrete components

Load switches are used in many applications and are conventionally designed using a combination of discrete semiconductors (PMOS, NMOS, capacitors and resistors).  The typical set-up is illustrated in Figure 4.

The PMOS is the power switch (pass FET), which has its gate controlled by a regular N-Channel MOS (NMOS). Logic high turns on the PMOS by pulling its gate to ground through the NMOS, whereas a logic low turns off the pass switch by turning off the NMOS, allowing the PMOS gate to be pulled up to the source through an external pull up resistor. The size of the PMOS device depends on the desired rON. A large PMOS is needed if the user wants to switch with low dropout, and a small PMOS will be enough if only small currents are switched. In order to control the slew-rate (rise time) of the PMOS transistor, a resistor-capacitor network is used to alter a RC time constant as shown in Figure 4.

It is important that the input voltage of the pass FET stay higher than its output voltage, otherwise the input will be clamped via the body diode of the PMOS, which will cause significant current to flow from the output to the input.

This solution based on discrete components is quite flexible but not optimized from a solution size stand point, especially when switching low voltage power rails that cannot allow large dropout across a switch. Most of the time, a PMOS with low rON will be bigger than 5 mm2 or 1.5 mm2 for the most expensive ones, while a standard NMOS will be about 2.5 mm2. If you add a couple of resistors and a capacitor, the solution size can be above 6.5 mm2 and potentially above 10 mm2, depending on the package selected, and this without considering placement space.

figure 2
Figure 2: Application Example with a 1.2-V power rail

Another solution is to use an LDO, which is an interesting solution since it is offered in a single small package. However, the LDO has a major disadvantage in low-voltage systems. Affordable LDOs have a dropout in the range of 100 to 200 mV, which is not acceptable in most cases when switching low voltage rails. In the example shown on Figure 2, the LDO solution does not work since the dropout of the LDO (>100 mV) is greater than the maximum allowed dropout across the switch. To some extent, current consumption of the LDO in the range of 50 µA can be an issue as well.

The third and most likely optimal solution is to use an integrated load switch that combines all the functionalities of the discrete implementation. Integrated load switches like the TPS22901 or the TPS22902 from Texas Instruments are specifically designed as a solution to the challenges that portable power management designers are facing. They integrate all the main features of a discrete load switch on a single die, providing maximum performance and flexibility to the end-user.

Modern integrated load switches typically offer:

  • Ultra-low rON pass P-channel FET
  • Internally-controlled slew rate without external components
  • Low threshold control inputs
  • Ultra small packaging
  • < 1µA quiescent and shutdown current
  • Output discharge transistor

Since the main factor impacting the die size on such a device is the ON-resistance, designers can select devices with different rON values depending of their application needs, therefore, optimizing the cost of their solution.

The main advantage of an integrated load switch clearly is the solution size. As stated previously, a discrete implementation will occupy more than 6.5 mm2 while a similar integrated solution like the new TPS22901 in wafer chip scale package is 0.64 mm2 which is more than 10 times smaller!

Another interesting advantage is their ease of use. In the discrete implementation, the user needs to select five components and route their board accordingly. An integrated solution is an easy, proven, and quick solution to implement. Lastly, for users who do not want to see the power rail floating when the switch is turned off, the integrated solution offers the ability to quickly discharge the output rail at almost no additional cost.

In conclusion, using integrated load switches is an easy way to implement distributed power management architecture and to power down applications when they are not being used. Integrated load switches continue to solve designers’ challenges by providing flexibility, reduced component counts with increased overall reliability.

About the author

Philippe Pichot manages the strategic marketing and development for analog, USB and load switches product lines. Philippe received his MSEE from the Institut Superieur D’Electronique du Nord (ISEN) in Lille, France.

This article originally appeared in the Oct/Nov 2008 issue of Portable Design. Reprinted with permission.

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