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Design Articles

DSPs Vs. FPGAs: Is there a superior choice for portable design?

Recent FPGA achievements have leveled the playing field, but is it enough?

By David Coode, Audio DSP Team Manager, ON Semiconductor

chip graphic

In the 1980s both Field Programmable Gate Array (FPGA) and Digital Signal Processor (DSP) technologies evolved to provide more value to digital electronics designers over conventional ASIC approaches available at that time. These technologies were developed with different focuses: FPGAs to collect discrete logic into a single re-programmable product, and DSPs to provide more efficient signal processing solutions. Today, FPGAs have matured to the point where they can be effectively applied to signal processing tasks, a domain that has recently belonged only to DSPs. What are today’s designers of portable electronics to make of the convergence of these technologies in the signal processing space? What is the better solution?

FPGAs have a technical advantage that allows them to be a legitimate competitor over today’s DSPs because their basic silicon technology can be much more advanced. An FPGA is typically based on a silicon technology node, or two, ahead of new DSP offerings, which means that the logic of an FPGA is denser, faster and more power-efficient (at least in operation). Whether this technical advantage is enough to make FPGAs more attractive than DSPs, where architecture is refined for optimal signal processing, is heavily dependent upon application and technology focus.

Application and Focus
Consider two examples that highlight specific advantages of both DSPs and FPGAs. First, an audio application that does echo cancellation processing on a telephone network will be better served by a DSP since the solution will be smaller, more power efficient (thereby generating less heat) and lower cost. Echo cancelling and audio processing are popular applications so the architecture in an appropriate DSP is typically the better engineering choice. Second, the implementation of a DSP algorithm to break encryption cryptography will actually be better implemented on an FPGA. This type of algorithm benefits from large-scale parallelism, but since a large scale market does not exist for massively parallel DSPs in general, this function does not map well into existing DSPs.

The DSP solution is a preferred solution in the first case of the echo canceller because the product, reference designs, development tools and risk have all been optimized or solved for both consideration and understanding of market need. This is natural as the market is large and well established, and the need is clear. In the second case of the code-breaking application, the algorithm is not well suited to a standard DSP architecture, and owing to a small commercial market, there are no readily-available reference designs to rely on. An FPGA is more flexible and can better accommodate the needs of this signal processing application. To generalize this case, often algorithms requiring parallelism are better served with FPGAs over traditional DSPs.

Signal Processing Cores
With explosive growth in digital communications, including cellular wireless and broadband multimedia, fast-moving markets and applications have come to rely on digital signal processing to perform simple, highly repetitive multiply-accumulate operations on multiple channels of data. To address these opportunities, FPGA developers have introduced new generations of devices over the past decade with dedicated blocks of signal-processing circuitry, each comprising a multiply-accumulate (MAC) unit to create an embedded DSP core within the device. Successive new product introductions have provided more and more DSP MACs for designers to the extent that the latest families can achieve several billion multiply-accumulate operations per second (GMACS) when operating at frequencies in the order of 500 MHz. In this way, for example, a single FPGA can provide sufficient DSP resources to handle multiple channels to perform baseband processing such as Digital Down Conversion in a cellular base station.

A number of FPGAs are now available that are optimized for DSP applications.  With a variety of densities that can include up to several hundred embedded DSP cores, designers now have a certain ratio of DSP to general logic available to meet their application-specific requirements. Where a massively parallel DSP is required, such as in the cryptographic system example described previously or in a large multi-channel system, FPGAs typically now outperform dedicated DSPs, as well as providing extra opportunities for system-level integration using the general-purpose on-chip logic. Soft processor IP or dedicated processors implemented in hard logic on the chip, for example, allow engineers to satisfy an application’s control processing requirements within a single device. 

Regardless of the application or algorithm, better silicon solutions come with better application understanding and focus. Better means lower cost, lower power consumption, better integration, easier design-in and smaller size – all of which are of value, especially for the development of portable electronics.

Standalone DSPs, for example, tend to comprise fewer cores, and typically implement one or two MAC units with associated supporting functions, each of which is more efficient than what could be realized on an individual MAC unit in an FPGA. As such, they are less directed toward applications requiring massively parallel signal processing and more focused on those that require high-speed serial processing such as multimedia and audio functions. To satisfy parallel processing requirements up to several billion floating-point operations per second (GFLOPS), high-performance processing engines comprising multiple DSP chips, or DSP farms, have been built. In many cases, these are now being superseded with highly parallel DSP structures implemented in FPGAs, taking advantage of FPGAs’ typically smaller design rule to achieve a lower price as well as greater processing density.

In a focused application using a single DSP chip, such as a home multimedia product, a companion MCU may also be used to perform control-plane processing. Alternatively, converged devices are available that implement the DSP and MCU functions in a single chip. Some devices allow engineers to optimize the partitioning between the control and signal processing. An advantage of the converged device architecture is that engineers can complete their design within a unified development environment, which can bypass numerous hardware and software integration challenges. Converged devices also typically integrate peripherals performing functions such as industry-standard communication interfaces including serial ports, as well as wireless interfaces and other functions such as external memory controllers or host DMA.

Application-Optimized DSP
A converged signal processor can offer a tightly focused platform for various types of multimedia devices. Available codecs can support a variety of audio and video formats, and also allow engineers to implement new formats simply by changing the software. However, an Application Specific Standard Product (ASSP) incorporating optimized DSP resources, as well as necessary peripherals, can be tuned to deliver an even more tightly focused platform for a given challenge. Emerging generations of ASSPs for audio applications, which are built around a DSP core and implement critical system-management functions as well as the complete signal path, provide a good example of how focused silicon can fulfil all of these criteria.

BelaSigna
Figure 1: BelaSigna 300 audio processor

Figure 1 illustrates how the BelaSigna 300 audio processor from ON Semiconductor combines a 24-bit DSP core with on-chip memory, a dedicated input stage comprising four independent 24-bit ADCs, application-specific peripherals and interfaces, and an output stage including a class-D driver capable of interfacing directly to external speakers. Moreover, as an ASSP focused on digital audio applications for laptop and smartphone applications, the IC also implements custom controllers that manage the transfer and buffering of audio signals between processing elements and memory. Much of this device could be replicated in an FPGA, for example, provided the designer pay careful attention to meeting timing constraints when implementing the controller functions. The analog input and output stages would also need to be implemented externally in an FPGA-based solution, demanding careful attention to managing issues such as noise. The tight application focus of the ASSP has also enabled optimization of the DSP resources to execute the required algorithms in the most power-efficient manner. For example, the HEAR accelerator illustrated is a parallel core operating alongside the 24-bit CFX DSP, and optimized to perform audio-specific signal processing functions such as time-frequency transforms, vector multiplications, CORDIC approximations, and energy calculations.

Hence, when evaluating a processing platform for a portable audio or multimedia product, the question is not so much whether to use an FPGA or DSP, but which type of signal processing device delivers the best trade-off between performance, cost, power consumption, size and time to market. Given that there is no universally optimum technology choice for all signal processing applications, there are some design considerations that can guide the way.

Design Considerations
Another major factor for choosing either an FPGA or DSP is complete solution cost. An FPGA may cost a factor of two or four times more than a DSP to tackle a given problem, and up to 10 times more than an ASSP. In an application that may require several DSP chips, such as a video controller that needs to handle 10-bit R, G and B signals simultaneously, a BOM analysis may favor the FPGA. Another more common scenario is for lighter signal processing tasks where an FPGA is already in the design with some spare blocks; these might be used for signal processing “for free.” Although FPGAs are integrating more features in the latest products, these additions are almost all digital. Currently, only DSP and ASSPs deliver mixed-signal chips that can offer the integrated A/Ds and D/As that are so often needed in real-world signal processing work. Having external components adds size, cost and usually power consumption over an integrated solution, and should be avoided if possible in a portable application. Overall, where a suitable ASSP is available this will likely provide the most highly integrated solution, thereby saving bill of materials costs as well as reducing size and power consumption.

On Semi
Figure 2: Design considerations in portable electronics

When considering signal processing in portable devices, solution size and power consumption are critical design considerations (Figure 2). Since chip size is directly related to flexibility of application, FPGAs are at an immediate disadvantage for portable designs. FPGAs have also, historically, been at a disadvantage in terms of power consumption. Some FPGA manufacturers have put a lot of focus into reducing power consumption, with various devices offering lean, highly optimized feature sets and on-chip power management. Combined with the advantages of being one or two process nodes ahead of competing device technologies, this allows some low-power FPGAs to achieve comparable power consumption to generic DSPs.

In practice, power consumption is more closely linked to the operating speed rather than the complexity of the device. For this reason, a DSP core that is optimized to execute the desired algorithms at the optimum speed for the application can be extremely power efficient. The BelaSigna 300 audio processor chip, for example, can operate at a clock speed that is five-to-ten times slower than would be required for a generic processor to achieve equivalent performance.

Ease of design is another important factor that can improve a design engineer’s quality of life and enable shorter design cycles for quicker time-to-market. Both goals can be achieved in large part with good mature design software tools. For FPGA tools, this would include the availability of proven DSP soft cores that can be used and customized in the design and a higher-level language which will allow a signal processing algorithm to be defined. This is a notable improvement for the RTL/VHDL level tools for an engineer looking at a signal processing application. DSP design tools also benefit from good optimizing compilers for higher-level languages like C. In both cases, a well-stocked software library is essential. The ideal DSP tools will benefit from tools that allow abstraction to the block-diagram level, but efficiency can suffer with this approach. As with the other dimensions, market focus can yield some very valuable tools from the solution suppliers, such as complete reference designs.

Conclusion: Improving Value Proposition
In summary, there are still a number of advantages to using DSPs over FPGAs for signal processing applications in portable devices. However, until only recently, FPGAs were only considered for bench prototypes in most of the portable design world. Clearly, the gap to the DSP for commercial deployment is closing. This diminishing gap delivers benefits to designers targeting small or unknown markets, by providing a practicable route to a custom DSP solution in the absence of a suitable ASSP. However, as ASSP design cycles are also diminishing, the window for developers to build and introduce an FPGA-based product is becoming ever shorter.

As the solutions available in the form of FPGAs, DSPs and ASSPs continue to evolve rapidly, customers can expect exciting shifts delivering new and better value propositions.

About the Author
David Coode manages the Audio DSP team at ON Semiconductor that develops DSP-based audio processing ASSPs designed for portable applications (www.belasigna.com). Coode received his B.A.Sc. in computer engineering at the University of Waterloo in Waterloo, Canada.

ON Semiconductor
Phoenix, AZ
(602) 244 6600
www.onsemi.com

This article first appeared in the August, 2008 issue of Portable Design. Reprinted with permission.

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