Advanced Dynamic Voltage Scaling via VSEL, One-Pin EasyScale or I2C Interface
Interface and DVS functionality gives the system designer a new and highly advanced tool to achieve the best results in today’s complex applications.
In today’s applications dynamic voltage scaling (DVS) means either optimizing battery lifetime in portable applications, or saving energy and reducing heat in complex, multiprocessor environments.
In both areas systems are running with one or several types of processors, starting from basic microcontrollers and ARM-type processors to complex digital signal processors (DSP), graphic processor units or application processors. Most types use either a constant supply voltage for the complete processing unit, or several voltage rails for different internal building blocks such as core supply, I/O supply, memory supply and others.
Depending on the application, its environmental situation and the processor type, one or several of the supply rails could to be changed on-the-fly during operating. For example, in an earlier Portable Design article, “Reducing Power with Dynamic Voltage Scaling”  a standard DSP is designed with two main operating points. Today most processor types support two operating points for different operating situations. However, I/O ports and memory supply rails also can be scaled during operation to save battery power, increase system run-time or reduce overall power consumption.
The latest generation of power management components offers several options for implementing selectable output voltages. Linear regulators (LDOs), DC/DC converters with integrated power FETs, as well as highly integrated multichannel power management units, are capable of voltage scaling with integrated DVS.
The most basic option is a simple voltage selection pin. With a spare I/O port on a processor/microcontroller, a voltage select pin (VSEL) on the power management component can be toggled between two preset output voltages. Usually those voltages are preset on the integrated circuit’s (IC) manufacturer side and can be programmed to systems engineer requirements. This enables a wide choice of selectable voltage options. Additionally, odd combinations easily are possible as long as they are within the minimum and maximum device ratings.
Practically all of the above listed power management families offer this choice. It is relatively easy to implement on the IC side, as well as easy to use by systems engineers. The two selectable output voltages can be precisely implemented. Depending on the applied output voltage range, process technology, power rating and device family, their output voltage values can be specified in increments, for example 50 mV, 100 mV, 250 mA or others.
Figure 1: Linear regulator with VSEL between 3.15V and 1.85V
Taking into account today’s output voltage accuracies, which typically are between more or less three to seven percent for lower-power DC/DC converters, the step-size from which to select a voltage is usually larger than the output regulation of the device itself. For example, a DC/DC converter with approximately five percent accuracy swings at 3.3V output voltage between 3.135V and 3.465V. This is ±0.165 mV, much smaller than the common 50 mV increment.
On the other hand, ICs controlled by inter-integrated circuits (I2C) easily can achieve 25 mV step-size or less, so using the latest generation power management ICs with an accuracy of ±1.5 percent or less is a viable option.
For a simple 200 mA-rated LDO with VSEL, 3.15V and 1.85V can be switched with a transient of ~100 μs at 10 mA load current. Optimizing output capacitors reduces over/undershoot magnitude, but increases duration of the transient response (Figures 1 & 2).
One-Pin Interface EasyScale
Figure 2: Basic schematic of a LDO with VSEL pin
Another more advanced option is using a one-pin serial interface called EasyScale. It’s a simple serial, 16-bit protocol for communication between the processor and power management IC and uses a master/slave structure. The key advantage over other one-pin interfaces is its independence from the bit transmission rate. It automatically detects bit rates between 1.7 Kbits/s up to 160 Kbits/s. Initially this interface became popular on white LED backlight driver ICs due to the improved digital dimming capability and immunity to audible noise.
Power management components using this interface include dual-channel buck DC/DC converters, as well as single-channel boost DC/DC converters.
These ICs offer several advantages over basic VSEL models such as greatly increased flexibility. Most processors work very well with two operating points. However, next-generation processors (or special application processors) can operate with multiple operating points. Power management devices driving these systems need to provide fast transient changes when sweeping through voltage levels, highly accurate voltage regulation, and enough options on voltage step-sizes to offer enough flexibility for optimization (Figure 3).
Figure 3: Dual-channel DC/DC buck converter using DVS on both channels
for powering two processor rails
Power ICs with the above capabilities offer three main benefits: 1) extend the amount of supported processors significantly; 2) increase the chance of a perfect adjustment to those dedicated operating points; 3) enable easy testing, prototyping and lab exercises in a new system.
DC/DC converter step-sizes with EasyScale interfaces again depend on the required output voltage range, process technology, power rating and device family. These are usually 25 mV, 50 mV, 100 mV or larger (Figure 4).
Figure 4: EasyScale transient response signal changing from 1.1V to 1.5V
within 50 ms at 150 mA
Using the dual-channel buck DC/DC converter as an example, two choices are available for selecting a certain output voltage. First, the fully adjustable version gives full setting controls for any output voltage, which is limited only by the minimum/maximum ratings on the IC specification. Step-sizes can be as small as 25 mV and are limited only by the internal register settings for both channels. This enables a very fine adjustment of each operating point.
If the simulation shows that the processor works best at 1.875V instead of the given datasheet point of 1.8V, only a small change in the DC/DC converter’s communication protocol is necessary to achieve best performance and thermal behavior. A detailed table with all possible step-sizes/voltage options and combinations can be found in the TPS62400 datasheet.
The second option for choosing an output voltage is to use the factory pre-programmed IC versions. This is similar to VSEL and simplifies the use of this device. Instead of setting the full 16-bit protocol, two main voltages are available and toggle with the help of the EasyScale interface just between those two operating points. A practical example is using this during testing and prototyping a system. During test and lab conditions, use the fully adjustable version to optimize processor operating points, power management schemes and other conditions. However, during mass production or ramp-up, limit the selection to two key voltage points.
Still another even more advanced option is using a standard I2C interface. The two most common modes of operation are standard mode with 100 kHz and fast mode with 400 kHz bus clock speeds. Both operating speeds are very common and widely used in today’s available processors or microcontrollers. Therefore, it’s also becoming popular in the latest generation of higher integrated, multichannel power management units, which are optimized to power-dedicated applications or graphics processors.
Several power management unit (PMU) building blocks such as LDOs, DC/DCs, battery chargers, A/D converters, LED drivers and others require a fairly large amount of information to operate flexibly. The I2C interface can be used to adjust voltage rails, optimize sequencing, enable-disable building blocks, support start-up or power-save mode and many more (Figure 5).
Figure 5: Six-channel PMU with I2C interface
While I2C is common in multichannel PMUs, it is not necessarily common in single- or dual-channel power management ICs. Thus far, the need for advanced dynamic voltage scaling in devices with limited functionality such as LDOs and DC/DC converters can be covered by VSEL and one-wire EasyScale interfaces.
Nevertheless, next-generation power management ICs are part of the complete system approach. They are driven from portable applications that are battery powered.
Application processors are designed for maximum performance at lowest total power consumption. Therefore, advanced power management ICs will play a key role in those system-level approaches. I2C will be used in standard and fast mode as well as in high-speed mode, which allows a bus clock of up to 3.4 MHz. This enables real-time power adjustments on a single I2C bus, and even more advanced data or command communication on a second I2C bus.
Interfaces and dynamically scalable voltages in power management ICs have at least two main functions. The first is to optimize processor operating points for best performance, maximizing battery life in portable applications or limiting overall system power consumption. Second, they are easy to use during prototyping, system evaluation and testing before an application enters mass production.
The increased flexibility in adjusting voltages on-the-fly via software shortens testing time, optimizing and evaluating new applications. It also minimizes laboratory changes on the PCB or to hard-wired components such as resistor dividers to achieve the required voltage.
Alternatively, as power management engineers are required to better understand software, optimum results can be achieved through much closer teamwork between processor, software and hardware engineers. Interface and DVS functionality gives the system designer a new and highly advanced tool to achieve the best results in today’s complex applications.
Texas Instruments Inc.
- “Reducing Power with Dynamic Voltage Scaling,” Alex Friebe, Portable Design, October 2007.
This article originally apppeared in the April, 2008 issue of Portable Design. Reprinted with permission.